The present invention relates to an improvement in a semiconductor memory device, and, more particularly, to a memory cell device of a MOS (Metal Oxide Semiconductor) static memory that consumes little power.
A conventional CMOS static RAM has an arrangement as shown in FIG. 4 of "A HI-CMOSII 8K.times.8Kb Static RAM", O. Minato et al., ISSCC 1982, Digest of Technical Paper, PP. 256-257. The RAM has memory cells arranged in a matrix form composed of rows and columns. Bit and word lines are connected to the memory cells. Each bit line is connected to a power source voltage through a bit line load circuit.
In a conventional static RAM of this type, each memory cell is connected to a ground terminal. In the columns which are not selected for read/write access (to be referred to as nonselected columns hereinafer), a current always flows from the power source to the ground through the bit line load circuit, the bit lines and memory cells being connected to the selected word lines. In other words, current always flows through the bit lines of the nonselected columns.
During write/read access, it is only necessary to use the memory cells of the selected columns to achieve the function of the memory device. Therefore, the power consumption of the memory cells of the nonselected columns may be minimized within the data retaining range of the memory cells without impairing the function of the memory device.
In the conventional static RAM, however, the power consumption of the memory cells of the nonselected columns is substantially the same as that of the selected columns. During an operation of write/read access, most of the columns are nonselected columns. More particularly, in a static RAM constituting one word by n bits, the total number of selected columns is n, and the remaining columns are nonselected columns. For example, in a 256-kbit RAM of 32 kwords 8 bits, eight columns from among 512 columns are selected columns, and 504 columns are nonselected columns. For this reason, most of the total operating power consumed is power consumption by the memory cells of the nonselected columns.
In the conventional static memory device, the operating power consumption of the nonselected columns is large, and power is wasted because it exceeds the level necessary to retain the data.